For Error-tolerant Functions (E.g. Graphics Purposes)

thememorywave.org
In a DRAM chip, every little bit of memory information is stored as the presence or absence of an electric charge on a small capacitor on the chip. As time passes, the fees within the memory cells leak away, so without being refreshed the saved data would eventually be misplaced. To forestall this, external circuitry periodically reads each cell and rewrites it, restoring the cost on the capacitor to its authentic degree. Each memory refresh cycle refreshes a succeeding space of memory cells, thus repeatedly refreshing all the cells on the chip in a consecutive cycle. This process is usually conducted automatically in the background by the memory circuitry and is clear to the user. While a refresh cycle is occurring the memory just isn't accessible for regular learn and write operations, but in modern memory this overhead will not be massive enough to significantly decelerate memory operation. Static random-access memory (SRAM) is electronic memory that doesn't require refreshing. An SRAM memory cell requires four to six transistors, compared to a single transistor and a capacitor for DRAM